Tags: VLSI

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  1. Benchmark circuits for clock scheduling and synthesis

    2015-03-24 22:10:45 | Datasets | Contributor(s): Rickard F. Ewetz, Shankarshana Janarthanan, Cheng-Kok Koh | doi:10.4231/R7Q23X5D

    This repository contains experimental data related to our ASP-DAC 2015, ISPD 2015, and DAC2015 publications.

    https://purr.purdue.edu/publications/1759

The Purdue University Research Repository (PURR) is a university core research facility provided by the Purdue University Libraries and the Office of the Executive Vice President for Research and Partnerships, with support from additional campus partners.